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YNM05S05 DC-DC Converter Data Sheet
3.0-5.5 VDC Input; 0.7525-3.63 VDC Programmable @ 5 A
Operations
Input and Output Impedance
The Y-Series converter should be connected via a
low impedance to the DC power source. In many
applications, the inductance associated with the
80
70
60
50
40
distribution from the power source to the input of the
converter can affect the stability of the converter.
The use of decoupling capacitors are recommended
to ensure stability of the converter and reduce input
ripple voltage. Internally, the converter has 20 μ F
(low ESR ceramics) of input capacitance.
30
20
10
0
0
1
2
Vout [V]
3
Vin=5.0V
Vin=3.3V
4
In a typical application, low - ESR tantalum or POS
capacitors will be sufficient to provide adequate
ripple voltage filtering at the input of the converter.
However, very low ESR ceramic capacitors
Fig. B: Input Voltage Ripple, C IN = 470 μ F polymer + 2x47 μ F
ceramic.
47 - 100 μ F are recommended at the input of the
converter in order to minimize the input ripple
voltage. They should be placed as close as possible
R*
Vin
ON/OFF
Y-Series
Converter
(Top View)
Vout
to the input pins of the converter.
Vin
The YNM05S05 has been designed for stable
operation with or without external capacitance. Low
GND
TRIM
Rload
ESR ceramic capacitors placed as close as possible
to the load (minimum 47 μ F) are recommended for
improved transient performance and lower output
voltage ripple.
It is important to keep low resistance and low
inductance PCB traces for connecting your load to
the output pins of the converter. This is required to
maintain good load regulation since the converter
does not have a SENSE pin for compensating
voltage drops associated with the power distribution
system on your PCB.
Fig. A shows input voltage ripple for various output
voltages using four 47 μ F input ceramic capacitors.
The same plot is shown in Fig. B with one 470 μ F
polymer capacitor (6TPB470M from Sanyo) in
parallel with two 47 μ F ceramic capacitors at full
load.
70
60
50
40
30
CONTROL
INPUT
Fig. C: Circuit configuration for ON/OFF function.
ON/OFF (Pin 1)
The ON/OFF pin (Pin 1) is used to turn the converter
on or off remotely via a system signal that is
referenced to GND (Pin 4). Typical connections are
shown in Fig. C.
To turn the converter on the ON/OFF pin should be
at a logic low or left open, and to turn the converter
off the ON/OFF pin should be at a logic high or
connected to Vin.
ON/OFF pin is internally pulled down. A TTL or
CMOS logic gate, open-collector (open-drain)
transistor can be used to drive ON/OFF pin. When
using open-collector (open-drain) transistor, add a
pull-up resistor (R*) of 5 K to Vin as shown in Fig. C.
The external pull-up resistor can be increased to 10K
if the minimum input voltage is more than 3.0 V and
to 20K if the minimum voltage is more than 4.5 V.
This device must be capable of:
20
10
0
0
1
2
Vout [V]
3
Vin=5.0V
Vin=3.3V
4
–
–
sinking up to 1.2 mA at a low level voltage of
0.8 V
sourcing up to 0.25 mA at a high logic level of
2.3 V – 5.5 V.
Fig. A: Input Voltage Ripple, C IN = 4x47 μ F ceramic.
MCD10190 Rev. 1.0, 21-Jun-10
Page 5 of 25
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